Benefits of VIA Atlantic VT6510B/C

Simplicity
Provides a simple low maintenance plug and play network interconnect system for small to medium size businesses

Scalability
Highly scalable feature set allows system manufacturers to enable or disable a range of features to best meet their target price point.

Value
Highly integrated design drives down overall switch manufacturing costs enabling the migration from unmanaged switches and repeaters to intelligent next generation switch solutions.

Key Features

» Single-chip low-power non-blocking store-and-forward shared-memory layer-2 switched Ethernet controller
» 9 10/100BaseT/TX ports
» 1 Gigabit Ethernet port
  - 802.3z and 802.3ab compliant
  - GMII interface to connect with Gigabit PHY devices and integrated Physical Coding Sublayer (PCS) logic to provide direct interface to Gigabit SERDES transceivers.
  - Gigabit port can also be configured as a 10/100Mbps MII port, the 10/100Mbps RMII ports 0.7 can also be configured as a 1Mbps GPSI port to support the (8+2) HomePNA1.0 switch application.
» High-performance switching engine performs forwarding and filtering at full wire speed, maximum 148,810 packets/sec on each 100Mbps Fast Ethernet port, and maximum 1,488,100 packets/sec on the 1000Mbps Gigabit Ethernet port.
  - Efficient self-learning and address recognition mechanism enables forwarding rate at wire speed
» Embedded 2Mbit packet memory and 1Mbit control memory.
  - 10/8/6K address table entries.
  - 1/2/4K VLAN table entries.
  - 2K buffer link nodes.
  - 1K IP multicast table entries.
  - 512 protocol-based VLAN index table entries.
  - 290 MIB counters (only for VT6510B, not supported in VT6510C).
  - Programmable, up to 2K bytes maximum Ethernet frame length.
» Supports SMI auto-polling for configuring speed, duplex mode, and 802.3x flow control capability for each Ethernet port to enable plug-and-play operation. All ports can be in force mode or auto-polling mode.
  - Supports individual SMI and SPI interface for polling Ethernet PHY and HomePNA1.0 PHY.
» 802.3x support
 - Supports 802.3x flow control for full-duplex ports. Supports collision-based backpressure for half-duplex ports.
 - Supports 802.3ad port trunking with flexible load distribution control and fail-over function.
» 802.1 support
 - 802.1Q port-based VLAN with both IVL and SVL.
 - 802.1v protocol-based VLAN classification.
 - 802.1s Multiple Spanning Trees.
 - Fast address migration to support 802.1w Rapid Reconfiguration.
 - 802.1p Class of Service with 2-level priority queueing.
» Supports 16-bit CPU interface for 8/16-bit IDE, ARM with DMA (single/block/demand mode), 80186 with DMA (single/block mode) for management and SOHO router applications.
» Auto-negotiation for configuring speed, duplex mode, and 802.3x flow control capability for the gigabit Ethernet port with (full duplex only) TBI interface.
» Head of Line (HOL) blocking prevention.
» Broadcast storm filtering.
» Supports both Direct and CRC-map hashing algorithms.
» Supports IP Multicast ing by 1K IP multicast table.
 - 10/8/6K address table for unicast or static multicast addresses.
» Auto-aging with programmable inter-age time.
» Provides 800 Mbps (4 full-duplex ports) aggregate bandwidth per trunk group.
» Supports chip initialization via strapping or 2-pin EEPROM interface. CPU initialization is supported but not required.
» Supports source-port-based, destination-port-based, and source-destination-pair-based Sniffer function.
» Support for ingress port security mode.
» Provides 29 counters per port to support MIB II-RFC1213 (RMON Groups 1, 2, 3, 9), RFC1493(Bridge MIB), RFC1643(Ether-Like MIB) (only for VT6510B, not supported in VT6510C).
» Provides serial LED display for port status, buffer/bandwidth utilization, and power-on embedded memory self-test indication.
» Internal oscillator and PLL
 - Only a low-cost 25MHz external crystal required
» 2.5V core, 3.3V pad, TSMC 0.22mm CMOS process, 208-pin EDHS-PQFP package.